
Tech • IA • Crypto
Google DeepMind published a 60-page roadmap led by co-founder Shane Legg outlining a path to artificial superintelligence (ASI) within a decade. The paper defines AGI as human-level across domains and ASI as vastly exceeding it, likened to thousands of experts working in parallel. It argues recent progress suggests timelines may be shorter than previously expected. The roadmap frames ASI as a foreseeable engineering outcome rather than distant theory.
DeepMind identifies four key technical pathways: scaling GPU compute, coordinating multi-agent systems, developing new architectures, and enabling recursive self-improvement. The emphasis shifts from single models to interconnected AI ecosystems. Multi-agent coordination is highlighted as a way to simulate collective intelligence. Recursive improvement is presented as the most transformative but also the most unpredictable factor.
The roadmap reopens debate over whether large language models alone can reach AGI. Critics like Yann LeCun have argued LLMs are insufficient, but recent advances are narrowing that skepticism. Hybrid systems combining reasoning, memory, and tools are gaining traction. The discussion signals a broader shift beyond pure scaling toward architectural innovation.
AI development is moving from standalone models to integrated systems that plan and execute tasks. The focus is increasingly on workflows, tool use, and end-to-end outputs rather than raw text generation. Systems are expected to deliver usable results, not just answers. This marks a transition toward practical, operational intelligence.
Abacus AI introduced agents that generate full applications instead of static responses. In one example, a prompt produced an interactive 3D data center model with layered infrastructure views. Users can explore and modify outputs directly, turning responses into working tools. The approach reframes AI as a builder of software environments.
New systems generate editable artifacts like Lucidchart diagrams, Excalidraw visuals, and interactive dashboards. Outputs remain live and modifiable rather than fixed. This enables iterative workflows where users refine results in place. The model becomes part of a continuous workspace instead of a one-shot generator.
Huawei introduced the Tao Scaling Law, shifting chip progress from transistor size to signal efficiency. The approach targets interconnect performance, now responsible for over 75% of signal delay in advanced chips. It challenges decades of reliance on Moore’s Law. The proposal reflects growing constraints in traditional semiconductor scaling.
Since 2019, US restrictions have limited Huawei’s access to EUV lithography from ASML, constraining China’s SMIC to around 7 nm nodes. This creates a 10–15 year gap with leading-edge manufacturing. Huawei’s response includes vertical integration techniques like logic folding. The shift signals geopolitical pressure accelerating alternative innovation paths.